The inventors of the present disclosure have been focusing research in the area of resistive memory within the field of integrated circuit technology. While much of resistive memory technology is in the development stage, various technological concepts for resistive memory have been demonstrated by the inventors, and are in one or more stages of verification to prove or disprove associated theory(ies). The inventors believe that resistive memory technology promises to hold substantial advantages over competing technologies in the semiconductor electronics industry.
The inventors of the present application for patent have studied resistive memory cells, such as resistive-switching memory. Resistive-switching memory can be configured to have a plurality of states with distinct resistance values. For instance, the plurality of states can include a relatively low resistance state and a relatively high resistance state, in a single bit cell. Multi-bit cells might have additional states with respective resistances that are distinct from each other and from the relatively low resistance state and the relatively high resistance state. The distinct resistance states of the resistive-switching memory cell represent distinct logical information states, facilitating digital memory operations. Accordingly, the inventors believe that arrays of many such memory cells can provide many bits of digital memory storage.
In various embodiments, the inventors induce resistive-switching memory cells to enter one or another resistive state in response to an external condition. Thus, in transistor parlance, applying or removing the external condition can serve to program or de-program (e.g., erase) the memory. Moreover, depending on physical makeup and electrical arrangement, the inventors maintain that a resistive-switching memory cell can generally maintain a programmed or de-programmed state. To have a memory cell maintain a state, the inventors recognize that other conditions be met (e.g., existence of a minimum operating voltage, existence of a minimum operating current, and so forth), or no conditions be met, depending on the characteristics of a memory cell device.
In light of the above, the inventors desire to make further innovations in the area of resistive semiconductor memory technology.